#RISC-V

Libriscv is a versatile RISC-V sandboxing library designed for ultra-low latency and small resource consumption. Its specialized emulator achieves speeds of executing VM functions in just 3 nanoseconds, clearly outperforming standard solutions. With a robust API for secure data transfers and adaptable modes like JIT-compilation and binary translation, libriscv is cross-platform and easy to embed. It also supports dynamic linking, streamlines debugging through GDB, and is tailored for rapid development. Ideal for gaming or high-performance computing, libriscv offers a compliant emulation environment with modern security practices.

The project provides a framework to enhance FPGA-based soft processors, specifically targeting improvements in machine learning performance. By simplifying infrastructure complexities, users can concentrate on developing processor instructions to speed up computations. It ensures fast collaborative iteration on processor enhancements and offers a comprehensive guide from selecting a TensorFlow Lite model to conducting simulations using Renode or Verilator. While designed for use with hardware like the Arty FPGA board, it allows simulation without physical devices. Utilizing mainly open-source tools, except for Vivado, it is suitable for engineers, interns, and students exploring machine learning processor advancements.