CFU Playground: Boosting Machine Learning with Custom FPGA Processors
CFU Playground is an innovative project designed for engineers, interns, and students who are eager to enhance machine learning (ML) performance through custom FPGA-based processors. The project focuses on making ML tasks more efficient by allowing users to design and evaluate their own processor instructions. This is achieved by abstracting complex infrastructure details, enabling users to quickly adapt and focus on performance improvements.
How It Works
The process begins by selecting a TensorFlow Lite model, such as a quantized person detection model, although users are free to use their own models. The chosen model is then run on an Arty FPGA board to measure cycle counts per layer. This provides insights into which TensorFlow Lite operators to optimize.
Users can then dive into the code, designing new instructions to replace multiple basic operations, ultimately crafting a custom function unit within the FPGA. This custom unit executes the newly designed instructions. To incorporate these enhancements, users modify the TFLite/Micro library kernel to utilize the new instructions, which are accessible using function call syntax.
Finally, users rebuild the FPGA system on a chip (SoC), recompile the TFLM library, and rerun the tests to measure performance improvements. It's important to note that this project is geared towards performance development rather than demonstrations, with a focus on achieving faster cycle counts.
Hardware and Software Requirements
The CFU Playground requires specific hardware and software setups:
- Supported Hardware: The project is compatible with various boards like Arty A7-35T/100T, iCEBreaker, and others from LiteX Boards. The host operating system must be Linux (Debian/Ubuntu).
- Software Tools: Depending on the chosen board, different FPGA toolchains may be required. Users may either utilize Xilinx's Vivado or the open-source SymbiFlow toolchain. For Lattice iCE40 or ECP5 boards, users can install relevant open-source tools or use the Lattice toolchain.
For those without hardware, the project offers simulation options using Renode or Verilator, enabling experimentation on a host machine without specialized hardware or toolchains.
Project Setup
To get started, users need to clone the CFU Playground repository and run the setup script. For those experimenting with different boards, the project provides instructions for building SoCs and loading bitstreams. Simulations can be run through Renode or Verilator, providing flexibility for users without physical boards.
Key Features and Options
CFU Playground offers a variety of flags and options to customize the build process. Users can select specific platforms, targets, toolchains, and more, providing a tailored experience suited to different development needs and hardware capabilities.
Underlying Technology
CFU Playground stands on a solid foundation of open-source technologies, including:
- LiteX: A framework for assembling SoCs.
- VexRiscv: An RISC-V soft CPU optimized for FPGAs.
- Amaranth: A Python toolbox for building digital hardware.
Licensing and Contributions
The project is licensed under the Apache-2.0 license. Contributions are welcome, and interested individuals can review the contribution guidelines. The project adheres to Google's code of conduct, emphasizing a respectful and collaborative community.
CFU Playground represents a leap forward for those interested in pushing the boundaries of ML processing through custom hardware solutions. Its open-source nature and innovative approach provide a platform for learning, experimentation, and performance enhancement in the field of machine learning.